EC6010 ELECTRONICS PACKAGING SYLLABUS FOR 7TH SEM ECE REGULATION 2013 - Anna University Multiple Choice Questions

EC6010 ELECTRONICS PACKAGING SYLLABUS FOR 7TH SEM ECE REGULATION 2013

 ANNA UNIVERSITY ECE SYLLABUS
EC6010 ELECTRONICS PACKAGING SYLLABUS
7TH SEM ECE SYLLABUS
REGULATION 2013
EC6010 ELECTRONICS PACKAGING SYLLABUS
EC6010 ELECTRONICS PACKAGING SYLLABUS
OBJECTIVES:
 To give a comprehensive introduction to the various packaging types used along with the associated same the thermal, speed, signal and integrity power issues.
 To introduce about CAD used in designing wiring boards 

UNIT I OVERVIEW OF ELECTRONIC SYSTEMS PACKAGING
Definition of a system and history of semiconductors, Products and levels of packaging, Packaging aspects of handheld products, Definition of PWB, Basics of Semiconductor and Process flowchart, Wafer fabrication, inspection and testing, Wafer packaging; Packaging evolution; Chip connection choices, Wire bonding, TAB and flip chip.

UNIT II SEMICONDUCTOR PACKAGES
Single chip packages or modules (SCM), Commonly used packages and advanced packages; Materials in packages; Thermal mismatch in packages; Multichip modules (MCM)-types; System-in-package (SIP); Packaging roadmaps; Hybrid circuits; Electrical Design considerations in systems packaging, Resistive, Capacitive and Inductive Parasitics, Layout guidelines and the Reflection problem, Interconnection.
 
UNIT III CAD FOR PRINTED WIRING BOARDS
Benefits from CAD; Introduction to DFM, DFR & DFT, Components of a CAD package and its highlights, Beginning a circuit design with schematic work and component, layout, DFM check, list and design rules; Design for Reliability,Printed Wiring Board Technologies: Board-level packaging aspects, Review of CAD output files for PCB fabrication; Photo plotting and mask generation, Process flow-chart; Vias; PWB substrates; Surface preparation, Photoresist and application methods; UV exposure and developing; Printing technologies for PWBs, PWB etching; PWB etching; Resist stripping; Screenprinting technology, hrough-hole manufacture process steps; Panel and pattern plating methods, Solder mask for PWBs; Multilayer PWBs; Introduction to, microvias, Microvia technology and Sequential buildup technology process flow for high-density, interconnects

UNIT IV SURFACE MOUNT TECHNOLOGY AND THERMAL CONSIDERATIONS
SMD benefits; Design issues; Introduction to soldering, Reflow and Wave Soldering methods to attach SMDs, Solders; Wetting of solders; Flux and its properties; Defects in wave soldering, Vapour phase soldering, BGA soldering and Desoldering/Repair; SMT failures, SMT failure library and Tin Whisker, Tin-lead and lead-free solders; Phase diagrams; Thermal profiles for reflow soldering; Lead freevAlloys, Lead-free solder considerations; Green electronics; RoHS compliance and e-waste recycling, Issues, Thermal Design considerations in systems packaging (L. Umanand, Thermal Design considerations in systems packaging

UNIT V EMBEDDED PASSIVES TECHNOLOGY
Introduction to embedded passives; Need for embedded passives; Design Library; Embedded resistor processes, Embedded capacitors; Processes for embedding capacitors; Case study examples.

TOTAL: 45 PERIODS

OUTCOMES:

Given an electronic system PCB or integrated circuit design specifications, the student should be in a position to recommend the appropriate packaging style to be used, and propose a design a design procedure and solution for the same.

TEXT BOOK:
1. Rao R. Tummala, “Fundamentals of Microsystems Packaging”, McGraw Hill, NY, 2001

REFERENCE:
1. William D. Brown, “Advanced Electronic Packaging”, IEEE Press, 1999.

No comments:

Post a Comment