EC6009 ADVANCED COMPUTER ARCHITECTURE SYLLABUS FOR 7TH SEM ECE REGULATION 2013 - Anna University Internal marks 2018

EC6009 ADVANCED COMPUTER ARCHITECTURE SYLLABUS FOR 7TH SEM ECE REGULATION 2013

 ANNA UNIVERSITY ECE SYLLABUS
EC6009 ADVANCED COMPUTER ARCHITECTURE SYLLABUS
7TH SEM ECE SYLLABUS
REGULATION 2013
EC6009 ADVANCED COMPUTER ARCHITECTURE SYLLABUS
EC6009 ADVANCED COMPUTER ARCHITECTURE SYLLABUS
OBJECTIVES:
The student should be made to: 
 Understand the micro-architectural design of processors.
 Learn about the various techniques used to obtain performance improvement and power
savings in current processors.

UNIT I FUNDAMENTALS OF COMPUTER DESIGN
Review of Fundamentals of CPU, Memory and IO – Trends in technology, power, energy and cost, Dependability - Performance Evaluation

UNIT II INSTRUCTION LEVEL PARALLELISM
ILP concepts – Pipelining overview - Compiler Techniques for Exposing ILP – Dynamic Branch Prediction – Dynamic Scheduling – Multiple instruction Issue – Hardware Based Speculation – Static scheduling - Multi-threading - Limitations of ILP – Case Studies.

UNIT III DATA-LEVEL PARALLELISM
Vector architecture – SIMD extensions – Graphics Processing units – Loop level parallelism.

UNIT IV THREAD LEVEL PARALLELISM
Symmetric and Distributed Shared Memory Architectures – Performance Issues –Synchronization – Models of Memory Consistency – Case studies: Intel i7 Processor, SMT & CMP Processors

UNIT VMEMORY AND I/O

Cache Performance – Reducing Cache Miss Penalty and Miss Rate – Reducing Hit Time – Main Memory and Performance – Memory Technology. Types of Storage Devices – Buses – RAID – Reliability, Availability and Dependability – I/O Performance Measures.

TOTAL: 45 PERIODS

OUTCOMES:

At the end of the course, the student should be able to:
 Evaluate performance of different architectures with respect to various parameters
 Analyze performance of different ILP techniques
 Identify cache and memory related issues in multi-processors
 
TEXT BOOK:
1. John L Hennessey and David A Patterson, “Computer Architecture A Quantitative Approach”, Morgan Kaufmann/ Elsevier, Fifth Edition, 2012.

REFERENCES:

1. Kai Hwang and Faye Briggs, “Computer Architecture and Parallel Processing”, Mc Graw-Hill International Edition, 2000.
2. Sima D, Fountain T and Kacsuk P, ”Advanced Computer Architectures: A Design Space Approach”, Addison Wesley, 2000.

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