ANNA UNIVERSITY, CHENNAI
REGULATIONS - 2013
M.E. APPLIED ELECTRONICS - SYLLABUS
AP7202 ASIC AND FPGA DESIGN
OBJECTIVES:
To study the design flow of different types of ASIC.
To familiarize the different types of programming technologies and logic devices.
To learn the architecture of different types of FPGA.
To gain knowledge about partitioning, floor planning, placement and routing including circuit
extraction of ASIC
To analyse the synthesis, Simulation and testing of systems. To understand the design issues of SOC.
To know about different high performance algorithms and its applications in ASICs.
UNIT I OVERVIEW OF ASIC AND PLD 9
Types of ASICs - Design flow – CAD tools used in ASIC Design – Programming Technologies:
Antifuse – static RAM – EPROM and EEPROM technology, Programmable Logic Devices : ROMs and EPROMs – PLA –PAL. Gate Arrays – CPLDs and FPGAs
UNIT II ASIC PHYSICAL DESIGN 9
System partition -partitioning - partitioning methods – interconnect delay models and measurement of delay - floor planning - placement – Routing : global routing - detailed routing - special routing - circuit extraction - DRC
UNIT III LOGIC SYNTHESIS, SIMULATION AND TESTING 9
Design systems - Logic Synthesis - Half gate ASIC -Schematic entry - Low level design language - PLA tools -EDIF- CFI design representation. Verilog and logic synthesis -VHDL and logic synthesis - types of simulation -boundary scan test - fault simulation - automatic test pattern generation.
UNIT IV FPGA
Field Programmable gate arrays- Logic blocks, routing architecture, Design flow technology - mapping for FPGAs, Xilinx XC4000 - ALTERA’s FLEX 8000/10000, ACTEL’s ACT-1,2,3 and their speed performance Case studies: Altera MAX 5000 and 7000 - Altera MAX 9000 – Spartan II and Virtex II FPGAs - Apex and Cyclone FPGAs
UNIT V SOC DESIGN
Design Methodologies – Processes and Flows - Embedded software development for SOC – Techniques for SOC Testing – Configurable SOC – Hardware / Software codesign Case studies: Digital camera, Bluetooth radio / modem, SDRAM and USB.
TOTAL: 45 PERIODS
REFERENCES:
1. M.J.S .Smith, "Application Specific Integrated Circuits, Addison -Wesley Longman Inc.,1997
2. S. Trimberger, Field Programmable Gate Array Technology, Edr, Kluwer Academic
Publications, 1994.
3. John V.Oldfield, Richard C Dore, Field Programmable Gate Arrays, Wiley Publications1995.
4. P.K.Chan & S. Mourad, Digital Design Using Field Programmable Gate Array, Prentice
Hall, 1994.
5. Parag.K.Lala, Digital System Design using Programmable Logic Devices , BSP, 2003.
6. S. Brown, R. Francis, J. Rose, Z. Vransic, Field Programmable Gate Array, Kluwer Pubin,
1992.
7. J. Old Field, R.Dorf, Field Programmable Gate Arrays, John Wiley & Sons, Newyork,1995.
8. Farzad Nekoogar and Faranak Nekoogar, From ASICs to SOCs: A Practical Approach,
Prentice Hall PTR, 2003.
9. Wayne Wolf, FPGA-Based System Design, Prentice Hall PTR, 2004.
10. R. Rajsuman, System-on-a-Chip Design and Test. Santa Clara, CA: Artech House Publishers, 2000.
11. F. Nekoogar. Timing Verification of Application-Specific Integrated Circuits (ASICs). Prentice Hall PTR, 1999.
No comments:
Post a Comment