ANNA UNIVERSITY, CHENNAI
REGULATIONS - 2013
VL7101 VLSI SIGNAL PROCESSING SYLLABUS
VL7101 VLSI SIGNAL PROCESSING SYLLABUS
ME 1ST SEM ELECTRONICS AND COMMUNICATION ENGINEERING SYLLABUS
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| VLSI SIGNAL PROCESSING SYLLABUS |
OBJECTIVES
To understand the various VLSI architectures for digital signal processing.
To know the techniques of critical path and algorithmic strength reduction in the filter structures.
To study the performance parameters, viz. area, speed and power.
To understand the various VLSI architectures for digital signal processing.
To know the techniques of critical path and algorithmic strength reduction in the filter structures.
To study the performance parameters, viz. area, speed and power.
OUTCOMES
To be able to design architectures for DSP algorithms.
To be able to optimize design in terms of area, speed and power.
To be able to incorporate pipeline based architectures in the design.
To be able to carry out HDL simulation of various DSP algorithms.
UNIT I INTRODUCTION
Overview of DSP – FPGA Technology – DSP Technology requirements – Design Implementation.
UNIT II METHODS OF CRITICAL PATH REDUCTION
Binary Adders – Binary Multipliers – Multiply-Accumulator (MAC) and sum of product (SOP) – Pipelining and parallel processing – retiming – unfolding – systolic architecture design.
UNIT III ALGORITHMIC STRENGTH REDUCTION METHODS AND RECURSIVE FILTER DESIGN
Fast convolution-pipelined and parallel processing of recursive and adaptive filters – fast IIR filters design.
UNIT IV DESIGN OF PIPELINED DIGITAL FILTERS
Designing FIR filters – Digital lattice filter structures – bit level arithmetic architecture – redundant arithmetic – scaling and round-off noise.
UNIT V SYNCHRONOUS ASYNCHRONOUS PIPELINING AND PROGRAMMABLE DSP
Numeric strength reduction – synchronous – wave and asynchronous pipelines – low power design – programmable DSPs – DSP architectural features/alternatives for high performance and low power.
TOTAL: 45 PERIODS
REFERENCES:
1. Keshab K.Parhi, “VLSI Digital Signal Processing Systems, Design and Implementation”, John Wiley, Indian Reprint, 2007.
2. U. Meyer – Baese, "Digital Signal Processing with Field Programmable Arrays", Springer, Second Edition, Indian Reprint, 2007.
3. S.Y.Kuang, H.J. White house, T. Kailath, “VLSI and Modern Signal Processing”, Prentice Hall, 1995.
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