CS6303 COMPUTER ARCHITECTURE SYLLABUS REG-2013 FOR 3RD SEM CSE DEPARTMENT - Anna University Internal marks 2018

CS6303 COMPUTER ARCHITECTURE SYLLABUS REG-2013 FOR 3RD SEM CSE DEPARTMENT

CS6303 COMPUTER ARCHITECTURE SYLLABUS FOR ANNA UNIVERSITY THIRD SEMESTER CSE STUDENTS
  • University : Anna university
  • Semester : 3rd Sem
  • Department : CSE
  • Year : Second Yr
  • Regulation : 2013
  • Subject Credits : 3
CS6303 COMPUTER ARCHITECTURE
SYLLABUS
REGULATION 2013

OBJECTIVES:
  • To make students understand the basic structure and operation of digital computer.
  • To understand the hardware-software interface.
  • To familiarize the students with arithmetic and logic unit and implementation of fixed point and floating-point arithmetic operations.
  • To expose the students to the concept of pipelining.
  • To familiarize the students with hierarchical memory system including cache memories andvirtual memory.
  • To expose the students with different ways of communicating with I/O devices and standard I/O interfaces.
UNIT I OVERVIEW & INSTRUCTIONS
Eight ideas – Components of a computer system – Technology – Performance – Power wall –
Uniprocessors to multiprocessors; Instructions – operations and operands – representing instructions – Logical operations – control operations – Addressing and addressing modes.

UNIT II ARITHMETIC OPERATIONS
ALU - Addition and subtraction – Multiplication – Division – Floating Point operations – Subword parallelism.

UNIT III PROCESSOR AND CONTROL UNIT
Basic MIPS implementation – Building datapath – Control Implementation scheme – Pipelining – Pipelined datapath and control – Handling Data hazards & Control hazards – Exceptions.

UNIT IV PARALLELISM
Instruction-level-parallelism – Parallel processing challenges – Flynn's classification – Hardware multithreading – Multicore processors

UNIT V MEMORY AND I/O SYSTEMS
Memory hierarchy - Memory technologies – Cache basics – Measuring and improving cache
performance - Virtual memory, TLBs - Input/output system, programmed I/O, DMA and interrupts, I/O processors.

TOTAL: 45 PERIODS

OUTCOMES:
At the end of the course, the student should be able to:
  • Design arithmetic and logic unit.
  • Design and anlayse pipelined control units
  • Evaluate performance of memory systems.
  • Understand parallel processing architectures.
TEXT BOOK:
1. David A. Patterson and John L. Hennessey, “Computer organization and design’, Morgan
Kauffman / Elsevier, Fifth edition, 2014.

REFERENCES:
1. V.Carl Hamacher, Zvonko G. Varanesic and Safat G. Zaky, “Computer Organisation“, VI th
edition, Mc Graw-Hill Inc, 2012.
2. William Stallings “Computer Organization and Architecture” , Seventh Edition , Pearson
Education, 2006.
3. Vincent P. Heuring, Harry F. Jordan, “Computer System Architecture”, Second Edition, Pearson Education, 2005.
4. Govindarajalu, “Computer Architecture and Organization, Design Principles and Applications", first edition, Tata McGraw Hill, New Delhi, 2005.
5. John P. Hayes, “Computer Architecture and Organization”, Third Edition, Tata Mc Graw Hill,
1998.
6. http://nptel.ac.in/.

Reg 2013 study materials --> Click Here

No comments:

Post a Comment